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Controlling Chip Tilting During Module Mounting and Eliminating Short Circuits Caused Thereby

IP.com Disclosure Number: IPCOM000058587D
Original Publication Date: 1988-Nov-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Garben, B Gruber, HW [+details]

Abstract

By suitably arranging eight additional metal lines on a substrate, chip tilting can be readily controlled and short circuits caused thereby can be eliminated, thus increasing the module mounting yield. Processed VLSI chips are soldered by PbSn pads to substrates 1. Larger chips 2 additionally comprise four so-called orientation pads 3 which are arranged at the chip edges and which have no electrical function. If large chips are soldered to substrates 2 only slightly tilted, orientation pads 3 may lead to short circuits between adjacent lines on the substrate. The figure shows a plan view of a slightly modified substrate 1, by means of which chip tilting during module mounting can be readily controlled and short circuits caused thereby can be eliminated, thus increasing the yield of functional modules.