Browse Prior Art Database

Switchable Level Microsystem

IP.com Disclosure Number: IPCOM000058607D
Original Publication Date: 1988-Nov-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Olnowich, HT [+details]

Abstract

The two level microsystem has become a popular concept because it compacts the traditional micro-ROM by replacing it with two smaller ROMs, namely, the micro-store and the nano-store. However, in a pipelined design the second level has the disadvantage of adding a second stage of delay. A switchable level microsystem can add leverage to a computer system by combining the advantages of both one and two level state-of-the-art microsystems by switching between them. The nano-store for one implementation of the switchable microsystem contains one control order for each instruction and one copy of any additional control order required to complete the instruction set. Unlike the conventional two level approach, all instruction execution starts with the nano-store and bypasses the microstore completely.