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Curved Ground Plane Substrate for a High Performance Semiconductor Chip Disclosure Number: IPCOM000058635D
Original Publication Date: 1988-Nov-01
Included in the Prior Art Database: 2005-Feb-15

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Konian, RR [+details]


A technique is disclosed for reducing the noise coupled between adjacent wires on a semiconductor chip mounting plane by modifying the ground plane structure. Conventional substrate structures used for mounting semiconductor chips have a sandwich structure on top of the substrate. The sandwich structure is composed of a flat copper ground plane covered on top by a dielectric insulator with a metal wiring personality on the topmost surface. The ground plane is equidistant from the surface wiring personality and the metal lines converge from the outer edges of the substrate to the chip. Hence, the noise coupling is greater near the chip because the ratio of distances between signal lines is less than the ratio of distances between signal lines and the ground plane.