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General-Purpose Interface Bus Resident on Spd-Bus I/O Processor Disclosure Number: IPCOM000058745D
Original Publication Date: 1988-Dec-01
Included in the Prior Art Database: 2005-Feb-15

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Related People

Williamson, ER [+details]


A fast communications link between various input/output processors (IOPs) and other devices is accomplished by interfacing a TESLA card to provide an equal function without the necessity of adding an extra card. (An IOA can only be used in an SPD I/O Bus when it is paired with an IOP). Fig. 1 shows a block diagram of a General-Purpose Interface Bus (GPIB) IOP. A TESLA IOP contains a microprocessor bus structure and SPD I/O Bus interface which was derived from another IOP (6030 Communications Adapter). In addition, it contains a GPIB interface on the same physical card. It is this combination of functionality which is unique to any SPD I/O Bus IOP. (Image Omitted) The modules making up the GPIB interfaces are shown in Fig. 1.