Browse Prior Art Database

Error Counting System

IP.com Disclosure Number: IPCOM000059001D
Original Publication Date: 1988-Mar-01
Included in the Prior Art Database: 2005-Feb-15

Publishing Venue

IBM

Related People

Authors:
Christensen, NT [+details]

Abstract

An error counting system assumes that no more than two errors will be detected on any one machine cycle and therefore makes provision for only a 0, 1 or 2 error count increment per cycle using a modulo-3 error counter circuit with an Exclusive-OR circuit.