One Megabit Dynamic RAM in PIT Technology
Original Publication Date: 1988-Jun-01
Included in the Prior Art Database: 2005-Feb-15
There is shown a high speed Dynamic RAM structure that contains very small cell size, (50 square microns) high cell to bitline ratio, high alpha particle immunity, small chip size, and low leakage. The structure contains N channel FET transistors and polysilicon-oxide-silicon trench capacitors integrated into a bi-FET process, compatible with polymer filled trench isolation processes. The resulting product does not require circuit innovations for its use and results show reduced alpha particle effects.