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A CMOS A/D flash converter is described that is capable of operating in high speed.
English (United States)
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A High Speed Time-Multiplexed 6-Bit CMOS A/D Flash Converter
A CMOS A/D flash converter is described that is capable of operating in high
The flash converter uses dynamic comparators operating with a four phase
clock. As shown in Fig. 1, each comparator has a high speed, low gain
differential amplifier 1 and two dynamic latches 2, 3. The differential amplifier 1
amplifies the input signals and is also used as a buffer to isolate noises from the
dynamic latches 2, 3. At time t0, d1 goes high, sampling V1 and V2 into dynamic
latch 2. At t1, d2 goes up. The clock pulses d2 and d2 set latch 2. At t2, d3 goes
up, gating V10 and V20 to outside, and at t3, d4 goes up, equalizing V10 and
V20 and prepares the latch for next sampling.
The operation of dynamic latch 3 is the same as dynamic latch 2 except that
it does the sampling at d3 .