Browse Prior Art Database

Hybrid Cascode, Emitter-Coupled Logic

IP.com Disclosure Number: IPCOM000059327D
Original Publication Date: 1988-Aug-01
Included in the Prior Art Database: 2005-Feb-16

Publishing Venue

IBM

Related People

Authors:
Kiesling, DA [+details]

Abstract

The circuit described uses diode logic functions combined with emitter-coupled cascode circuits. The resultant combination results in more powerful logic functions with fewer levels of circuits in the series tree, yet minimizes the number of logic stage delays.