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Improving Operational Performance of Cache Memories - by Reducing Cache Miss Penalties

IP.com Disclosure Number: IPCOM000059573D
Original Publication Date: 1988-Dec-01
Included in the Prior Art Database: 2005-Feb-16

Publishing Venue

IBM

Related People

Authors:
Emma, PG Knight, JW Pomerene, JH Puzak, TR [+details]

Abstract

A technique is described whereby the performance of cache memory is improved by reducing the cache miss penalty by serving the cache miss as two mini-misses that are processed in parallel.