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Submicron Isolation Trenches in Silicon

IP.com Disclosure Number: IPCOM000059664D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
Grossman, BM [+details]

Abstract

Very small dimension trenches of the order of 0.25 micron width and several microns deep may be made in silicon substrates by depositing a small dimension pattern member of removable material against an edge, chemically converting the surface adjacent to the pattern member with a reaction that progresses under part of the pattern member, leaving an even smaller dimension, removing the pattern member, and using the smaller dimension as an etchant opening for trench formation. The technique is illustrated and described in the following 10 steps: (1) Begin with a multilayered structure consisting of a thick layer (1000 to 4000 ˜) of SiO2, a 500 to 2000 ˜ layer of polysilicon, 1.0 to 2.0 mm of photoresist, and 200 to 500 ˜ of low temperature plasma- deposited SiO2, all on top of a silicon substrate, as shown in Fig. 1.