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Dense Nor Read-Only Storage Cell

IP.com Disclosure Number: IPCOM000059704D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
Kalter, HL Wiedman, FW [+details]

Abstract

This read-only storage cell circuit includes six closely packed field- effect transistors, five of which are addressable as read-only storage devices. The use of a hexagonal diffusion/contact pattern allows maximum density to be achieved in arrays of the basic five-device memory cell. Fig. 1 shows the circuit for the basic repeating unit of the read- only storage cell. The circuit includes five addressable devices T1T5 and one depletion device TD, which is used to enable accessing of device T5.