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Dynamic True/Complement Generator

IP.com Disclosure Number: IPCOM000059739D
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
Bula, J Dean, AA [+details]

Abstract

A dynamic true/complement (T/C) circuit is described which simultaneously precharges true and complement outputs low. If this circuit is used to drive decoders, all the decoder outputs will be set initially to a logic "one" state. Upon the occurrence of a timed clock signal, the T/C circuit will take the correct true and complement state, and all the unselected decoder outputs will quickly go to a logic "zero" state. Noise immunity is achieved by using dynamic clocking and transfer devices. When this T/C circuit is used in other applications, e.g., logic, read only stores, etc., it often provides similar benefits. The dynamic T/C generator or circuit has two clocks CK1 and CK2, as shown in the figure. Clock CK1 is used to precharge the outputs so that both true and complement outputs are low.