Buffer Memory With Detection of Data Errors And Errors Caused by Faults in the Read And Write Address Registers
Original Publication Date: 1986-Jan-01
Included in the Prior Art Database: 2005-Mar-08
A buffer has a storage array and a read address register and a write address register that are independently incremented to address the array as a circular list, as is conventional. The address registers each have low order bit positions that provide the array address and have a next higher order bit position. As the addresses are incremented, the high order bit switches between 0 and 1 on alternate passes through the array.