Browse Prior Art Database

Microprocessor System Initialization Controller

IP.com Disclosure Number: IPCOM000059865D
Original Publication Date: 1986-Feb-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
Cooper, RJ Marsico, MA Pescatore, JC [+details]

Abstract

This article describes the scheme used in a microprocessor-based control unit to initialize the microprocessor-based system. The scheme employed solves a problem that is ignored in typical microprocessor-based systems. That problem is the handling of exception interrupts that occur during the initial bring up of the system, particularly those occurring during the time that exception vectors must be moved from read-only storage to random-access storage. The typical microprocessor based system is designed assuming that interrupts will not occur during this time or that interrupts will not be handled during this time. This design provides the capability of handling exception interrupts during the system initialization time period.