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Process for Ion Implantation of Arsenic Emitters

IP.com Disclosure Number: IPCOM000059880D
Original Publication Date: 1986-Feb-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
Blouse, JL Forneris, JL Forney, GB Hrebin, G Planck, R Rozich, W Sherman, RD [+details]

Abstract

This article describes the processing required to form Arsenic Emitters with a nominal depth of 0.5 micron. Other N+ contacts are formed simultaneously for low ohmic contacts to Collectors, N Resistors and Schottky Barrier Diode Cathodes. The general cross section of the emitter structure 1 is shown in the drawing. A nitride layer 2 over an oxide layer 3 is formed after the standard base diffusion. A critical image mask is used to etch the nitride over all contact regions. Processing unique to the implant process begins immediately after the nitride etch. The same critical mask used to etch the nitride is employed to etch the SiO2 to silicon in all regions covered by post base oxidation. The method employed for etching the SiO2 depends on the structural dimensions of the product.