Browse Prior Art Database

Medium-Power, Minimal-Area Clamping Circuits for Bipolar Application

IP.com Disclosure Number: IPCOM000059995D
Original Publication Date: 1986-Feb-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
Gaudenzi, GJ Ippolito, PM Kroesen, RJ Reedy, DC Siegel, JD [+details]

Abstract

Two clamping circuits are disclosed in this article which provide good clamping action, a stable output level, and substantial area savings over alternatives. Fig. 1 illustrates a medium-power undershoot clamping circuit designed to prevent an excessively negative undershoot voltage from appearing on a transmission line driven by bipolar off-chip driver circuits. It is implemented as shown in Fig. 2. The output of this clamping circuit may be applied to each receiver input used in a long- line transmission line application, without concern for Beta degradation or breakdowns due to high line voltage, due to the series connection of transistor T1 and the Schottky barrier diode (SBD) S2. The circuit operates as follows: R1, S1, and D1 establish the bias circuit for the clamping circuit. Assuming Vbe = 0.8 volt and Vsbd = 0.