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In-Situ Cleaning Process for Low Contact Resistance to Silicon

IP.com Disclosure Number: IPCOM000060027D
Original Publication Date: 1986-Feb-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
Bhattacharya, SS Kuhlman, DD Nelson, EA Wong, MC [+details]

Abstract

In semiconductor manufacturing low emitter contact resistance is desirable for improved performance. A method has been developed for the in-situ cleaning of emitter contacts prior to contact metal deposition. The procedure provides a surface which gives good ohmic contact and no surface leakage between metal lines. When using materials such as tungsten or titanium-tungsten, there is a need to remove native oxide from the semiconductor surface to achieve desired low resistance ohmic contacts. In conventional processing sputter etching is often used, but the intensity required to achieve low contact resistance often results in surface leakage between metal lines. The new development is a two-step in-situ process which uses a reactive ion etch (RIE) followed by a gentle sputter-etch to prepare the surface.