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Splitting BHT for Variable TARGET Representations

IP.com Disclosure Number: IPCOM000060035D
Original Publication Date: 1986-Feb-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
Liu, L So, K [+details]

Abstract

A Branch History Table (BHT) has been used as a powerful mechanism in predicting the outcomes of conditional branches in high performance processors. Normally, a BHT is implemented as a set-associative array in which each entry consists of a pair and other necessary status information. At a "valid" BHT entry the SOURCE and/or TARGET addresses (e.g., by cutting off a few high-order bits in the halfword addresses). Even with such better address representations, the TARGET addresses in a BHT still typically require on the order of 24 bits to represent. In a practical workload it is well-known that taken branches do not usually go too far (forward or backward) from the branch instructions themselves. A new mechanism for more efficient representation of BHT addresses based on this observation is set forth below.