Improved Switching Circuit for Off-Chip Drivers
Original Publication Date: 1986-Mar-01
Included in the Prior Art Database: 2005-Mar-08
A circuit is described which provides simultaneous switching of multiple off-chip drivers. The circuit includes a push-pull output and a selectable high impedance input. The circuit, shown in the schematic diagram includes two inverters (T1, T3, R1, R2, R3, R5 and T2, T5, R4) which are interconnected by T4 for push-pull operation with resistor R1 common to both. With the input at a logic 0, T1 and T2 are on, T3 and T5 are off and T4 is on. This establishes a logic 1 at the output. The DC up-level is determined by R5 and R6 and the overshoot clamping network consisting of diodes D1, D2 and D3. When the input switches to a logic 1, the bases and collectors of T1 and T2 will begin to rise. Base current to T3 is provided by the path consisting of VCC, R2 and R3.