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Overlapped Processing During SVC Instructions

IP.com Disclosure Number: IPCOM000060456D
Original Publication Date: 1986-Apr-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
McDermott, MJ Mustain, RG [+details]

Abstract

On many multi-processor systems, when a Supervisor Call (SVC) instruction is issued, no other code is executed until the SVC is processed. Often, other tasks are ready to execute, yet for the duration of the SVC the main processor is not active. The duration of the average SVC may be several hundred microseconds. Overlapped SVC processing reduces the main processor idle time by providing increased processing overlap. Figs. 1 and 2 compare the task switching and SVC processing of a uniprocessor system and a multiprocessor system using the invention. On a uniprocessor system, when a supervisor call is issued, the processor stops executing application code, processes the supervisor call, then returns to the application code (Fig. 1).