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Expansion of Limited Microprocessor Address Space Via an Address Windowing Mechanism Disclosure Number: IPCOM000060495D
Original Publication Date: 1986-Apr-01
Included in the Prior Art Database: 2005-Mar-08

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Buonomo, JP Laubli, GW Livingston, DL Losinger, RE Sucher, DJ Walk, BM [+details]


Microprocessor (mP)-based computing systems are designed with a limit on the amount of memory that can be accessed. This architected 'address space' is primarily a function of the internal addressing structure of the mP and is used to access general-purpose random-access memory (RAM). In a complete system design, additional requirements may be placed on the address space to support resident Operating Systems in read-only memory (ROM), or additional peripheral devices, such as displays, disk drives, or printers, that require large memory buffer areas. When the access to these additional memory areas is made through the memory address space, as defined by the 'system' architecture, the amount of RAM that can be accessed by the mP is constrained further.