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High Fan-Out Push-Pull Receiver

IP.com Disclosure Number: IPCOM000060561D
Original Publication Date: 1986-Apr-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
Garlett, JD Reedy, DC [+details]

Abstract

A push-pull receiver circuit featuring a low input current and a fan- out of at least 16 AND-Inverters (AIs) is described in this article. Several problems exist with high fan-out receivers for which the disclosed circuit provides a solution. The first of such problems concerns the turn-off delay (TOFF), which generally increases to unacceptable levels as the number of AIs connected to the receiver increases, due to the increased capacitance connected to the receiver input. A second problem involves the general lack of ability of a high fan-out to sink the current from its attached AI's without incurring a reliability problem.