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Receiver Circuit With Differential Current Switch Logic Output

IP.com Disclosure Number: IPCOM000060576D
Original Publication Date: 1986-Apr-01
Included in the Prior Art Database: 2005-Mar-08

Publishing Venue

IBM

Related People

Authors:
Kroesen, RJ Pyun, YS Tayeban, K [+details]

Abstract

This article concerns a receiver circuit capable of generating a well controlled dual-phase output while providing a high DC noise tolerance and a threshold independent of power supply variations (+/-10%). The receiver circuit shown in the drawing is designed to work at predetermined voltage levels and to drive a differential current switch circuit. A DC noise tolerance of at least 340-400 mv may be developed while this receiver circuit operates between 10ŒC and 100ŒC at a Vcc of 5.0 +/- 10% volts. This noise tolerance is achieved by the hysteresis feedback of transistors T1 and T2 and a current mirror of transistors T5 and T6.