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Two-Pass Stuck-Fault Memory Test Error Correction Code Disclosure Number: IPCOM000060707D
Original Publication Date: 1986-May-01
Included in the Prior Art Database: 2005-Mar-09

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Related People

Finlay, DE Hanna, SD Norgren, KS Zufelt, IE [+details]


This is a description of a modification of a standard Hamming code which minimizes the time that is needed to test a memory with Error Correction Code (ECC) for bits stuck at 1 and at 0. Many present memory card designs use a 'standard version' of a modified Hamming code, and therefore require a three-pass memory test. This ECC bit arrangement would only require a two-pass memory test to test for stuck memory bits. The previous implementation would yield the same ECC bits for exactly complementary data in the 16-bit data word.