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Communication Mechanism Between a Service Processor and a Processor

IP.com Disclosure Number: IPCOM000060715D
Original Publication Date: 1986-May-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Laurent, B Lechaczynski, M Pauporte, A Poiraud, C [+details]

Abstract

This article relates to a mechanism used to connect a conventional microcoded processor and a service processor. The data flow of the processor comprises two registers A and B containing the operands and connected to an arithmetic and logical unit (ALU). A control store (CS) contains the microprogram to be executed and is used as a working memory. The service processor is used for performing various functions such as initial program loading and maintenance. The B-register of the processor is used as a mail box, and the link comprising the LSSD (Level Sensitive Scan Design) latches of the registers is used to transfer data. This will be described assuming that a word is to be written by the service processor into the control store of the central processor.