Browse Prior Art Database

Floating-Point Unit Cycle Generator

IP.com Disclosure Number: IPCOM000060770D
Original Publication Date: 1986-May-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Genduso, TB Kerr, GL Rodriguez, JR [+details]

Abstract

A technique is described whereby a computer program, called floating- point unit cycle time generator, utilizes a set of programming functions to create timing diagrams of floating-point operating instructions. The program is particularly useful in assessing the design and performance of a system of pipelined processors, operating concurrently, eliminating the need to develop simulator programs. With the advent of parallel processing and the use of pipelining to perform computer processing, the ability to predict the processing speed of computers, prior to hardware implementation, has been difficult because of the variables in the efficient use and the lack of analytical techniques of the elements involved. A typical technique is to study the performance of systems through the use of simulation models.