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Enable/Disable and Card ID Port for Memory Card

IP.com Disclosure Number: IPCOM000060873D
Original Publication Date: 1986-May-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Itoh, H [+details]

Abstract

This article describes an input/output (I/O) port control for plural memory cards which are optionally mounted on a system bus. Each memory card is provided with a card identification (ID) circuit and an enable/disable flip-flop (FF) circuit. All card IDs of the memory cards are simultaneously read by one I/O Read instruction with a particular I/O address. Similarly all enable/disable FF circuits of the memory cards are also set or reset in parallel by one I/O Write instruction with this particular address. The figure shows a block diagram of one memory card including a 1 megabyte (MB) random-access memory (RAM) 10, a dual inline package (DIP) switch 11, a card ID circuit 12, an address match circuit 13, an enable/disable circuit 14 and a data buffer 15. The DIP switch 11 comprises four switches, i.e.