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Implementing Bipolar Transistors and Capacitors in CMOS Circuits

IP.com Disclosure Number: IPCOM000060899D
Original Publication Date: 1986-May-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Ames, RD Dillinger, TE Gruver, MR [+details]

Abstract

Current CMOS technologies offer only N and P channel transistors in their device set. A cross-section of these two devices is illustrated in Fig. 1. Here, the P-channel transistor is formed with a P implant 2 in the N type well 1. The N-channel transistor is formed with an N implant 3 in the bulk P epitaxial material. Additional devices can be formed by the inclusion of two extra implants in the processing sequence. One of the devices formed is a bipolar NPN transistor (Fig. 2). Here, the existing N well structure 1 forms the collector of the device. The base 4 is formed with an additional P type implant. The emitter of the device is formed by using the existing implant that forms the N channel source and drain 3. Another device that proves desirable is a gate-oxide capacitor. This device, also shown in Fig.