TTL Tri-State Driver Circuit
Original Publication Date: 1986-Jun-01
Included in the Prior Art Database: 2005-Mar-09
The circuit shown is a TTL tri-state driver that utilizes power supplies of VCC = 3.4 V and VC = 1.7 V. The driver can communicate on a tri-state bus (not shown) with other tri-state drivers (not shown) that utilize a 5 V power supply. In the high impedance state the driver operates as follows: With the Z (control) input at logic "0" and the D (data) input at either "1" or "0", T1 is Off, T2 is On, T9 is Off, T6 is On, and T10 and T11 are respectively Off. When another driver, utilizing a 5 V power supply, is controlling the three-state bus and presents a maximum voltage of 5.5 V at the output of the driver, the clamp consisting of T12, T13, T14 and SBD2 will maintain the base emitter reverse bias voltage of T10 to less than 2.75 V. In normal operation, the clamp is Off and the driver operates as a normal TTL driver.