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PROCESS FOR IMPROVING SiO2-Si INTERFACE PROPERTIES

IP.com Disclosure Number: IPCOM000061082D
Original Publication Date: 1986-Jun-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Nguyen, TN Ray, AK [+details]

Abstract

Low temperature processing is required in the fabrication of VLSI circuits to minimize the diffusion and redistribution of dopants to obtain shallow and controllable impurity profiles. It is particularly important when dopants in such critical regions as the channel, source and drain of MOS transistors are already in place. The reduced temperature cycles, however, can result in high oxide fixed charge and interface trap charge due to inadequate annealing of the gate oxide. These charges are known to depend only on the last temperature cycle; thus, a high temperature anneal following the gate oxidation will not be effective.