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Read, Read/Write Memory Cell

IP.com Disclosure Number: IPCOM000061093D
Original Publication Date: 1986-Jun-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Smith, CD [+details]

Abstract

A bipolar dual-port random-access memory (RAM) cell design can integrate devices across memory cell boundaries. As seen in the schematic, the RAM has two ports, one port being read port and the other a read/write port. Word Line Read (WLR) and Word Line Read/Write (WLR/W) are the cell inputs for ports read and read/write, J is the cell current bias input, and bit read (BR) and bit read not (BRN) are current sinking bit line outputs that represent the read port's true and complement outputs. Bit read/write (BRW) and bit read/write not (BRWN) are the source currents for the bit lines that represent the read/write port's true and complement input/output. The Word line inputs and the bias input for the cells in an array are each wired in rows, the number of cells per row being the number of bits per word.