High-Performance Embedded Array Cell
Original Publication Date: 1986-Jul-01
Included in the Prior Art Database: 2005-Mar-09
The described array cell is small, power-efficient, and reliable. Embedded arrays using this cell achieve significantly higher density and significantly lower power dissipation than arrays made from logic circuit latches. Although the semiconductor industry has been producing custom chips that contain both digital logic and arrays for several years (a la microprocessor CPUs), the concept of embedding personalizable arrays on general-purpose logic masterslices is relatively new. Their development is being aided by the historical trends of decreasing machine cycle time, increasing circuit density per chip, and increased use of small, fast registers. The embedded array cell is shown in Fig. 1.