Browse Prior Art Database

Complementary Emitter-Coupled Logic to Open Collector Driver Circuit Disclosure Number: IPCOM000061262D
Original Publication Date: 1986-Jul-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue


Related People

Kroesen, RJ Pyun, YS Tayeban, K [+details]


This article describes the design of a complementary emitter-coupled logic (CECL) to off-chip open collector driver circuit which functions with a relatively small delay with neither PNP transistors or reference voltages. By means of the diode chains T2A-T4A and T2B-T4B shown in the above VTL open collector driver circuit, the input signal levels at (IN) and (NIN), nominally 5.0 and 4.7 volts, respectively, are stepped down to 1.8 and 1.5 volts, thereby saving power and improving circuit performance. The diode chains track, while accepting power supply variations of +/- 10% and temperature variations from 10ŒC to 100ŒC while maintaining a 300-millivolt differential at nodes T1 and T2. Transistors T2, TB1 and TC1 are employed to amplify the voltage swing from 300 millivolts to approximately 3.0 volts.