Browse Prior Art Database

Memory Expansion for Microprocessor

IP.com Disclosure Number: IPCOM000061352D
Original Publication Date: 1986-Jul-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Barucchi, G [+details]

Abstract

Most microprocessors have an addressing capability of 64K half words in a directly addressable control storage which corresponds to a 16-bit address bus provided by the microprocessor. In some applications there is a need to have an expansion of the control store. This article relates to a solution for increasing the memory size. It is based on the fact that in general the microcode stored in the memory may be split into two parts: the microcode instructions and the data. The data are stored in one control store CSM2, and the microcode instructions in another control store CSM1, both being addressed by the same address bus from the microprocessor. Moreover, the CSM1 is also addressed from the machine incorporating the memory to fetch or store data by cycle steal.