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Sequential State Analyzer for Safe Error-Detection Mechanism

IP.com Disclosure Number: IPCOM000061473D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Leotard, R Montanari, G [+details]

Abstract

This article is related to a system for avoiding wrong internal hardware error reporting when the errors are due to abnormal environment changes. In many cases the mechanism implemented inside a machine to detect failure is based on echo checking or sampling synchronously with the external world (clocking). When changes occur in the environment, such as cables plugging/unplugging, power ON/OFF of modems or terminals, etc., disturbances may occur on clocks and data/control signals during the changes. These disturbances create false error detections which can be logged erroneously as internal box error and lead to a wrong problem determination.