Browse Prior Art Database

Low Power CMOS General-Purpose Interface Receiver With a Clocked-Gate Option

IP.com Disclosure Number: IPCOM000061513D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Kim, IW [+details]

Abstract

This article describes a CMOS general-purpose interface (GPI) receiver designed to reduce power requirements, and features a clocked gate output option which may be used as a control feature for other GPI receivers. Previous GPI receiver circuits consumed substantial amounts of power because the input drive transistor was always turned on to meet the initial load current requirements presented by the output load when gated. The circuit shown in Fig. 1 was designed so that the initial high load (output) current demands are met by driver T1 after which time the load current demands are substantially reduced and are transferred to driver T9 which is designed to supply much smaller current loads. T1 is turned off post drive to conserve power.