Sense Driver Circuit for Bipolar Arrays
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09
This article describes an efficient means for array sensing and output driving. A sense driver circuit is disclosed. It combines in one circuit the functions of sensing and output driving, thus achieving both a more efficient use of chip area and enhanced circuit performance. Fig. 1 shows a conventional array sensing and output driving scheme as used in high performance random-access memories (RAMs). Two levels of logic are employed in this design, the first consisting of a sense amplifier per data group for bit line voltage sensing. The sense amplifier (Fig. 2) converts the selected cell's READ data into true and complement signals to feed the output driver circuit (the second level of logic), as shown in Fig. 3. In addition to an off-chip driving function, the driver circuit also provides a data hold (latch) function.