Driver With Noise-Dependent Switching Speed Control
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09
Driver T1, T2 is provided with an additional sense circuit T3, T4 controlled by the noise voltage peeks on ground line GND. Circuit T3, T4 controls a control circuit T5, T6 which is arranged parallel to the driver output OUT and which optimally sets the driver switching speed, depending on the sensed noise voltage. The trend of VLSI microprocessor development has been towards larger chips, wider on-chip buses, higher performance, and faster clocks. Wider buses, however, require a larger number of internal on-chip tristate drivers. As such drivers often drive relatively high capacitive loads, a high current, directly proportional to the switching speed, flows for a short time during logic state switching, leading to voltage peeks on the power and ground lines of the chip.