Browse Prior Art Database

Self-Check MACRO Design for Ic Chips

IP.com Disclosure Number: IPCOM000061589D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Marolt, DJ Noble, TM Phan, NV Rainey, DJ Russell, MJ Verheul, JM Zack, JW [+details]

Abstract

This article describes a macro design scheme which relies on the chip design system to perform the self-check and auto-check. After the macro is designed as a chip, the 'Chip to Macro' programs convert the design into a macro that can be used on a chip. The use of chip design tools to design macros implies that all tools that are available for chips are also available for macros at no extra cost. See the figure for an example. BUILD MACRO LOGIC: The macro logic is described using the micro books as building blocks. This logic function is verified using simulation and used to drive physical design. Looping constructs in the logical description are used to simplify logic coding of arrays. PLACE AND WIRE MACRO: The books are manually placed and wired using interactive graphics tools.