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Color DOT Read Circuit

IP.com Disclosure Number: IPCOM000061600D
Original Publication Date: 1986-Aug-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Aoki, Y Watanabe, S [+details]

Abstract

A circuit is described which makes it possible for the number of color planes (memory planes) and the size of a bus between a color plane and a read/write (R/W), circuit to simulate a value different from an actual physical value when color dot data are read from the color planes. With reference to Fig. 1, four color planes 0, 1, 2 and 3 are connected to a R/W circuit 10 through four buses 20, 21, 22 and 23, respectively, each of which has a physical bus size of 8 bits. The R/W circuit 10 includes a dot selection register 12, a mode register 14, a position register 16, four 8:1 multiplexers 30, 31, 32 and 33, a 4:1 multiplexer 45 and a gate 50.