Improved Propagation of Detection Probabilities
Original Publication Date: 1986-Sep-01
Included in the Prior Art Database: 2005-Mar-09
Self-test based on hardware-generated pseudo-random patterns and hardware signature registers is a known process for detecting hardware faults in digital logic. Prior to the use of self-test on a part, however, at least a lower bound on the expected coverage of the self- test must be determined in order to establish the adequacy of the test. There are known methods of generating a lower bound on the detection probability for each individual fault (LB(P)), from which it is possible to generate a lower bound on expected coverage for that part. Determination of LB(P) for all faults of a part is likely to result in excessive costs, however. Therefore, any means for reducing the number of faults that must be processed is useful.