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Described is a method of determining an anticipated large scale computer cycle time. It permits a quantification of the reliability advantages of predicting a given cycle time.
English (United States)
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Method for Cycle Time Determination
Described is a method of determining an anticipated large scale computer
cycle time. It permits a quantification of the reliability advantages of predicting a
given cycle time.
The longest time required for a signal to propagate from a storage element
(latch) to another storage element (latch) in a processor is the cycle time of that
processor. Determining this cycle time is difficult because the circuit delays in
both the data path and clock distributions are a function of temperature, power
supply, and semiconductor process variations. Thus a cycle limiting path in one
processor may not be limiting on a second processor. Described is a method
using statistical sampling theory to predict machine cycle time. It eliminates the
need to use an arbitrary margin which does not enable one to quantify
performance versus reliability. The method is as follows:
1.As complete systems are tested on the test floor, record the fastest cycle at
which each system will run at stressed voltage levels and preferably, stressed
temperature conditions. After this data has been recorded for all available
systems prior to cycle time announce, compute the mean cycle time from this
sample and the variance of the sample measurements.
2.Calculate the true machine mean at a desired confidence level using the t-
3.Calculate a confidence level for the true machine cycle time variance using
the chi-square distribution.
4.Choose a confidence level for the machine cycle time announce, based on
reliability objectives. Determine the si...