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Improved Complementary Transistor Switch Cell Layout

IP.com Disclosure Number: IPCOM000062027D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Chin, WB Ritter, GA Samuels, DJ Vargas, AA [+details]

Abstract

This article describes an improved complementary transistor switch (CTS) cell layout design for the clamped Schottky barrier diode (SBD) by incorporating two separate P regions (see figure) instead of the conventional one P region configuration. The new design permits mask misalignment during the manufacturing process without affecting the SBD anode contact area. As shown in C, the spacing between the two P regions is fixed. If mask misalignment takes place, the Schottky anode contact area (G) remains constant. In this new design the clamped Schottky is insensitive to mask misalignment which minimizes current hogging and improves cell stability. By reorienting the PNP emitter contact, as shown in section A of the figure, from the normal position (section E) we are able to increase the PNP emitter to isolation spacing (H).