Regular and Fast Hardwired Interconnection for a Group of Execution Units to Calculate All Partial Results of an Associative Operation
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2005-Mar-09
It is pointed out that it can be very important for a computer designed for general-purpose parallel processing to have a hardware support of the compound operation as a machine instruction for calculating all partial results of an associative function like addition and multiplication. This is because many frequently occurring data-dependent loops, which are very difficult for multiprocessors to handle efficiently in parallel, can be expressed in terms of this instruction, thus achieving optimal parallel efficiency and saving programmed branches otherwise needed.