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ALU Implementing Native Minimum/Maximum Function for Signal Processing Applications

IP.com Disclosure Number: IPCOM000062061D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Jones, GD [+details]

Abstract

This disclosure provides a means of implementing minimum and maximum algebraic and/or absolute magnitude finding functions in digital signal processors. This permits these functions to be executed in a single processor cycle which greatly reduces the amount of processing encountered in the numerous test and branch sequences normally used to execute minimum and maximum finding operations for signal processing applications. Particular improvement in the area of pipeline delay effects for pipelined signal processors is also achieved. In digital signal processing, many algorithms utilized require the finding of a signal level from among a number of samples.