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Cascode Current Switch Macros for Arithmetic Logic Unit Functions

IP.com Disclosure Number: IPCOM000062086D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Carter, EL Grindel, DR [+details]

Abstract

A set of macros providing the arithmetic logic unit (ALU) functions (AND, OR and XOR) and ADD function, when used with carry look-ahead macros, use less chip real estate and lower power than using a standard dual-ended cascode design. In this design the AND G = (AB), XOR P = (A + B) and the NOR N = (A+B) are created in one macro. A and B are the two inputs (Fig. 1). This is not a standard dual-ended cascode design, i.e., true and complement outputs, but one in which the outputs are one of three high active signals. The one of three high logic signal is achieved by using a current-splitting technique that functions in the following manner: Transistor T1, resistor R1 and VR1 form a current source which provides current I to the emitters of T2-T4. The steering of this current provides the logic function.