Browse Prior Art Database

MOS Gate Construction Method

IP.com Disclosure Number: IPCOM000062090D
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Davari, B [+details]

Abstract

This article relates generally to integrated circuit fabrication and, more particularly, to a technique for forming control gates of metal oxide semiconductors with greater reliability. By depositing and patterning gate material after the source and drain are formed, potential problems, such as channeling of the source/drain implant through the gate material, subjecting the gate material to the drive-in heat cycle for the source/drain, a reoxidation step for better gate insulator integrity, and salicide bridging, can be avoided. A process for forming control gates subsequent to source and drain formation in MOS fabrication is described below: In Fig. 1, a substrate 1 is formed with recessed oxide region 2 and a thin oxide layer 3, and subjected to ion implantation to adjust its threshold value.