Single-Centered Reading Amplifier
Original Publication Date: 1986-Oct-01
Included in the Prior Art Database: 2005-Mar-09
This invention relates to a single-centered complementary metal-oxide- semiconductor (CMOS) sense amplifier to be used with a multiport random-access memory (RAM). The main feature of this sense amplifier is that it operates with a single bit line. Then it can be used to operate in conjunction with multiport RAMs provided with a cell having a single bit line at each port for reading. It can also operate with a cell provided with two bit lines while using only one. Description of operation The sense amplifier input is the node C, and point B is the output. 1.Pre-loading step Prior to each read or write operation, a pre-loading step to "1" is performed on the bit line by applying a "0" level on the clock input (---) of the sense amplifier.