Browse Prior Art Database

External Register File for LSI Floating-Point Processors

IP.com Disclosure Number: IPCOM000062285D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Schumacher, DP Smith, SM [+details]

Abstract

An arrangement is described in which a separate floating-point processor (FPP) is combined with a microprocessor. The trend in microprocessors is to implement floating-point arithmetic functions in a large-scale integrated (LSI) circuit separate from but closely coupled to the main processor. These FPP circuits were developed to provide a performance improvement over executing software in the main processor to implement the same function. Current technology does not permit the FPP and main processor to be combined in one LSI circuit. FPPs are usually slave processors to the main processor in a microprocessor-based system. They are issued commands and data by the main processor which are executed in lock step with it.