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Buffer Amplifier With Ultra-Low Output Impedance

IP.com Disclosure Number: IPCOM000062307D
Original Publication Date: 1986-Nov-01
Included in the Prior Art Database: 2005-Mar-09

Publishing Venue

IBM

Related People

Authors:
Chesters, MJ West, RM [+details]

Abstract

In a buffer amplifier, two NPN transistors are connected in long tail pair configuration with collector currents reflected in a unity gain PNP current mirror. Two further NPN transistors are connected in cascode configuration to form a high gain output structure with based currents supplied by opposite sides of the unity gain PNP current mirror. The balanced base currents of the output transistors, with the output structure connected into a negative feedback configuration, guarantee ultra-low output impedance. As shown in the diagram, the circuit comprises a long tail pair input structure T1 and T2, a high gain output structure T3 and T4, and a high efficiency unity ratio PNP mirror structure T5, T6 and T7. The output of the buffer amplifier may be required to sink current as well as source current.